The present disclosure generally relates to a differential charge pump for use in an electronic circuit, such as a phase-locked loop (PLL) circuit.
In a computer or other electronic system, clock signals are used to control and sequence the flow of data between sequential storage elements, such as registers or latches on an integrated circuit (IC). A clock circuit including a PLL can maintain precise phase relationships between a reference clock signal and a distributed clock signal that sequences digital logic or other circuit elements. Precise clock phase relationships may be useful in achieving known and efficient timing relationships between sequential logic elements.
A PLL circuit detects phase differences between a reference clock signal and a distributed clock signal, and generates control signals based on those phase differences. The control signals may be used to adjust the timing and/or frequency of a clock generation circuit such as a voltage-controlled oscillator (VCO), the output of which can be distributed to a plurality of logic or other circuit elements. Such a clock can be used in numerous elements in an integrated circuit, including a microprocessor, memory controller, graphics controller, and others.